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Research Paper | Electronics Communication Engineering | Volume 4 Issue 8, August 2015 | Pages: 1185 - 1187 | India
High performance Radix-4 FFT using Parallel Architecture
Abstract: In this paper, we propose a design architecture of an efficient Radix-4 FFT algorithm using parallel architecture. This parallel architecture plays an important role in the FFT computation speed of data samples. The proposed algorithm has a better power and area consumption compared to the conventional Radix-4 FFT Algorithm. By the repeated use of twiddle factors, algorithm reduces the complexity and memory consumption in terms of hardware point of view.
Keywords: DIF, DIT, FFT, DFT
How to Cite?: Pooja Swamy, R. Pavan Kumar, "High performance Radix-4 FFT using Parallel Architecture", Volume 4 Issue 8, August 2015, International Journal of Science and Research (IJSR), Pages: 1185-1187, https://www.ijsr.net/getabstract.php?paperid=SUB157500, DOI: https://dx.doi.org/10.21275/SUB157500