12Bit, 80MHz, 230mW Pipeline ADC using 3Bit Flash ADC

Himanshu Raj Pashine, Jayanthi K Murthy

Abstract: This work describes a 12-bit multibit-per-stage pipeline analog-to-digital converter (ADC) by using 3bit flash type ADC. Pipeline ADCs are the architecture of choice for ADCs used in such wireless communication systems. The Supply voltage for this Pipelined ADC is 3.3V for 0.18m Technology. The Characterization of Pipelined ADC is done in terms of SNDR, ENOB, INL, DNL, Power dissipation. The Simulation Result shows that the Sampling Rate is 80MS/s with power Dissipation of 230mW wasachieved in 0.18m technology. The easured SNDR is 62.21dB, ENOB is 10.041bit, DNL is 0.2049LSB and INL is 0.4067LSB 0.18m Technology.

Keywords: Analog to Digital ADC, Flash ADC, Digital Correction Block, Pipeline