Analog VLSI Implementation of Neural Network Architecture

Abhishek K. Shrinath

Abstract: Artificial intelligence is realized using artificial neurons. In the proposed design, we are using Artificial neural network to demonstrate the way in which the biological system processes in analog domain. The analog components like Gilbert Cell Multiplier (GCM), Adders, Neuron activation Function (NAF) are used in the implementation. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. We are using 45nm CMOS technology for layout designing and verification of proposed neural network. The proposed design of neural network will be verified for analog operations like signal amplification and frequency multiplication.

Keywords: Gilbert cell, neuron activation function, neural network, Analog Signals, VLSI

How to Cite?: Abhishek K. Shrinath, "Analog VLSI Implementation of Neural Network Architecture", Volume 4 Issue 2, February 2015, International Journal of Science and Research (IJSR), Pages: 653-656, https://www.ijsr.net/getabstract.php?paperid=SUB151220, DOI: https://dx.doi.org/10.21275/SUB151220