Fabrication of HgCdTe-CdTe-Au MIS Structures
Abstract: This study presents the fabrication methodology for HgCdTe/CdTe/Au metal-insulator-semiconductor structures intended for interface property investigation in HgCdTe infrared device applications. The fabrication process includes wafer mounting, mechanical polishing, chemo-mechanical polishing, optional photo-thermal annealing, CdTe passivation, post-annealing, and deposition of gate and back contacts. Critical processing parameters affecting surface quality and interface integrity are described. The fabricated MIS structures are intended for subsequent electrical characterisation, including capacitance-voltage analysis, to evaluate interface behaviour and fixed charge characteristics in the HgCdTe/CdTe system.
Keywords: MIS Structures, HgCdTe and CdTe, Infrared Detectors, Chemo-mechanical Polishing and Capacitance Voltage Characterisation
How to Cite?: Desh Bandhu Sharma, "Fabrication of HgCdTe-CdTe-Au MIS Structures", Volume 15 Issue 5, May 2026, International Journal of Science and Research (IJSR), Pages: 790-793, https://www.ijsr.net/getabstract.php?paperid=SR26511223717, DOI: https://dx.doi.org/10.21275/SR26511223717