Downloads: 0 | Views: 126
Research Paper | Electronics & Communication Engineering | India | Volume 11 Issue 2, February 2022
Fast Speed Base of Two Multiplication
Abstract: Multiplication is major concern in calculations. Performing multiplication on floating-point data is a long course of action and requires huge quantity of processing tremendous amount of handling time. By improve the fast speed of multiplication task overall speed of the system can be enhanced. The Bottleneck in the floating-point multiplication process is the multiplication of mantissas which need 53?53 bit integer multiplier for double precision floating-point numbers and Medic, and Chronic Signed digit algorithms exists to compare parameters like speed, complexity o f routing, pipe lining, resource required on FPGA. The comparison showed that Chronic Signed Digit Algorithm and Booth Multiplication Algorithm is better than Medic algorithm concerning speed and resources required on spartan3 FPGA
Keywords: Binary Multiplier Booth Multiplication Algorithm
Edition: Volume 11 Issue 2, February 2022,
Pages: 313 - 315