A Trench Gate Power MOSFET with Reduced Gate Charge - A Review

Harsh Sharma

Abstract: In this paper we have written the review of the work done by Ying Wang, Yan-Juan Liu, Cheng-Hao Yu, and Fei Cao in simulating a novel trench gate power MOSFET with reduced gate charge. They worked with a 2-dimensional device simulator named ATLAS and simulated their MOSFET to obtain input, output and transfer characteristics. It is found that the gate charge is reduced by 49.5 % without increasing the value of Ron. This is done so as to increase the switching speed of the device.

Keywords: Gate Charge, Switching Speed

How to Cite?: Harsh Sharma, "A Trench Gate Power MOSFET with Reduced Gate Charge - A Review", Volume 5 Issue 6, June 2016, International Journal of Science and Research (IJSR), Pages: 677-679, https://www.ijsr.net/getabstract.php?paperid=NOV164131, DOI: https://dx.doi.org/10.21275/NOV164131