International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064

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Research Paper | Electronics Communication Engineering | Volume 6 Issue 5, May 2017 | Pages: 2187 - 2189 | India


NoC Router Architecture and its FPGA Implementation

Arshi Nazish, Waseem Khanooni

Abstract: Network-on-Chip is a new paradigm of communication network into System-on-Chip (SoC). It overcomes the problems of traditional bus-based SoC and meet the communication requirement of next SoC. . It provides efficient communication and the data is routed through the networks in terms of packets. The routing of data is mainly done by routers. A router is one of the most important communication back bone in NoC. The design is implemented in VHDL and simulated in Xilinx ISE Design Suite 13.

Keywords: Network-on-chip NoC, System on chip SoC, Field Programmable Gate Array FPGA, Router, Architecture

How to Cite?: Arshi Nazish, Waseem Khanooni, "NoC Router Architecture and its FPGA Implementation", Volume 6 Issue 5, May 2017, International Journal of Science and Research (IJSR), Pages: 2187-2189, https://www.ijsr.net/getabstract.php?paperid=ART20173548, DOI: https://dx.doi.org/10.21275/ART20173548

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