Downloads: 122 | Views: 190

Research Paper | Electronics & Communication Engineering | India | Volume 3 Issue 6, June 2014

Implementation of a Pacemaker for Biomedical Application

Roopa T | Manjula B. M | Dr. Chirag Sharma

Abstract: In this project work A state machine approach has been followed to design and implement a single and dual chamber pacemaker in response to different heart beats from 35bpm-125bpm. The heart of the pacemaker system rests in the pulse generator which forms the major portion of the project. It has been developed using Verilog and implemented in hardware using FPGA. In the FSM; first an input event is detected. Once this input is detected a timer is set which will be the time between heartbeats; thus giving 35-125 heartbeats per minute. This pacemaker responses only when the QRS wave is low or high in compared to normal ECG wave. The designing and verification is done through verilog on Xilinx 14.1. Also; ECG signal is generated in modelsim 10.1b. The pacemaker response is verified with various heart beats from 35-125bpm.

Keywords: Single chamber Pacemaker, Dual Chamber Pacemaker, DDI mode

Edition: Volume 3 Issue 6, June 2014,

Pages: 2780 - 2785