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M.Tech / M.E / PhD Thesis | Electronics & Communication Engineering | India | Volume 4 Issue 5, May 2015
Design and Implementation of a Random Number Generator on FPGA
Vishakha V. Bonde [2] | A. D. Kale [2]
Abstract: Random numbers are used in a wide variety of applications. True random number generators are slow and expensive for many applications while pseudo random number generators (RNG) suffice for most applications. Although a majority of random number generators have been implemented in software level, increasing demand exists for hardware implementation due to the advent of faster and high density Field Programmable Gate Arrays (FPGA). FPGAs make it possible to implement complex systems, such as numerical calculations, genetic programs, simulation algorithms etc. , at hardware level. This paper discusses in detail the hardware implementation of several RNGs and their characteristics. Random number generator is required extensively by many applications like cryptography, simulation, numerical analysis, text-to-speech etc. Most C libraries have a pair of library routines for initializing, and then generating random numbers. For parametric speech synthesis application, a random number generator is required to produce noise samples. Therefore, a need has been felt for the design of a dedicated hardware for random number generator that generates one random number per cycle so that text-to speech conversion is done in real time.
Keywords: Random Number Generator, Cryptography, C, synthesis, text-to-speech, FPGA
Edition: Volume 4 Issue 5, May 2015,
Pages: 203 - 208
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M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 12, December 2015
Pages: 1804 - 1810Optimization of FPGA Architecture for Uniform Random Number Generator Using LUT-SR Family
Rita Rawate | M. V. Vyawahare
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Survey Paper, Electronics & Communication Engineering, India, Volume 4 Issue 3, March 2015
Pages: 1590 - 1592A Survey on Implementation of Random Number Generator in FPGA
Pallavi Bhaskar | Prof. P. D. Gawande