A Review on Implementation of Random Number Generation based on FPGA
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


Downloads: 118 | Views: 350

Review Papers | Electronics & Communication Engineering | India | Volume 4 Issue 1, January 2015 | Popularity: 6.3 / 10


     

A Review on Implementation of Random Number Generation based on FPGA

Vishakha V. Bonde, A. D. Kale


Abstract: Random number generator is required extensively by many applications like cryptography, simulation, numerical analysis, text-to-speech etc. Most C libraries have a pair of library routines for initializing, and then generating random numbers. For parametric speech synthesis application, a random number generator is required to produce noise samples. Therefore, a need has been felt for the design of a dedicated hardware for random number generator that generates one random number per cycle so that text-to speech conversion is done in real time. A random number generator (RNG) is a device designed to generate a sequence of numbers or symbols that dont have any pattern. Hardware-based systems for random number generation are widely used, but often fall short of this goal, albeit may meet some of the statistical tests for randomness for ensuring that do not have any de-codable patterns.


Keywords: Random Number Generator, Cryptography, C, synthesis, text-to-speech, FPGA


Edition: Volume 4 Issue 1, January 2015


Pages: 2749 - 2753



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Vishakha V. Bonde, A. D. Kale, "A Review on Implementation of Random Number Generation based on FPGA", International Journal of Science and Research (IJSR), Volume 4 Issue 1, January 2015, pp. 2749-2753, https://www.ijsr.net/getabstract.php?paperid=SUB15960, DOI: https://www.doi.org/10.21275/SUB15960

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