International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


Downloads: 115 | Views: 182

Research Paper | Electronics & Communication Engineering | India | Volume 4 Issue 4, April 2015


Implementation, Simulation and Synthesis of RSA Cryptosystem

Rafeek Alas | Dr. Kiran Bailey


Abstract: In this paper, we present a methodology to develop 64-bit RSA encryption engine on FPGA that can be used as a standard device in the secured communication system. The RSA algorithm has three parts i. e. key generation, encryption and decryption. The algorithm also requires random prime numbers for processing and generation of public and private key. We use right-to-left-binary method for the exponent calculation. This reduces the number of cycles enhancing the performance of the system and reducing the area usage of the FPGA. These blocks are coded in Verilog and are synthesized using Cadence RC Compiler tool and simulated in ModelSim-Altera Student Edition.


Keywords: Cadence RC, FPGA, ModelSim-Altera, Private Key, Public Key, RSA, Synthesize


Edition: Volume 4 Issue 4, April 2015,


Pages: 1350 - 1355


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