Efficient Hardware Utilization for Functional Broadside Test to Achieve High Fault Coverage

P. Durga Venkata Prasad, K. Tirumala Rao

Abstract: Functional broadside tests are two-pattern scan-based tests that avoid over testing by ensuring that a circuit traverses only reachable states during the functional clock cycles of a test. On-chip test generation has the added advantage that it reduces test data volume and facilitates at-speed test application. This paper shows that on-chip generation of functional broadside tests can be done using simple hardware, and can achieve high transition fault coverage forte stable circuits. With the proposed on-chip test generation method, the circuit is used for generating reachable states during test application. This alleviates the need to compute reachable states off-line

Keywords: Built-in test generation, functional broadside tests, reachable states, transition faults

How to Cite?: P. Durga Venkata Prasad, K. Tirumala Rao, "Efficient Hardware Utilization for Functional Broadside Test to Achieve High Fault Coverage", Volume 3 Issue 9, September 2014, International Journal of Science and Research (IJSR), Pages: 1938-1943, https://www.ijsr.net/getabstract.php?paperid=SEP14536, DOI: https://dx.doi.org/10.21275/SEP14536

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