International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
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ISSN: 2319-7064

High Speed Vedic Multiplier for 16 Bits Numbers

M. Narasimharao, R. V. Shashanka

Abstract: - Speed and occupational area are key in RISCs (Reduced Instruction Set Computers), DSPs (Digital Signal Processors). Knowing that most of the operations involved in processing signal are multiplications since fundamental process in communication modula

Keywords: Compressor, array, Booths multiplier, Urdhwa Tiryakbhyam Sutra, Vedic Mathematics

How to Cite?: M. Narasimharao, R. V. Shashanka, "High Speed Vedic Multiplier for 16 Bits Numbers", Volume 3 Issue 11, November 2014, International Journal of Science and Research (IJSR), Pages: 1672-1676, https://www.ijsr.net/getabstract.php?paperid=OCT141099, DOI: https://dx.doi.org/10.21275/OCT141099

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Article TypeM.Tech M.E PhD Thesis SubjectElectronics Communication Engineering IssueVolume 3 Issue 11, November 2014
Pages1672–1676 CountryIndia

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