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Research Paper | Computer Science Engineering | Volume 5 Issue 3, March 2016 | Pages: 511 - 518 | India
Fast Computation Using High Radix Signed Digit Number with Different Adders
Abstract: - The proposed system is an efficient implementation of 16-bit Multiplier- Accumulator using Radix-8 and Radix-16 Modified Booth Algorithm and seven different adders (SPST Adder, Parallel Prefix Adder, Carry Select Adder, Error Tolerant Adder, Hybrid Pref
Keywords: Radix-8 modified booth algorithm Radix -16 modified booth algorithm, Digital Signal Processing, VHDL
How to Cite?: Mahendra Prasad Sharma, "Fast Computation Using High Radix Signed Digit Number with Different Adders", Volume 5 Issue 3, March 2016, International Journal of Science and Research (IJSR), Pages: 511-518, https://www.ijsr.net/getabstract.php?paperid=NOV161897, DOI: https://dx.doi.org/10.21275/NOV161897