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Research Paper | Computer Science & Engineering | India | Volume 5 Issue 3, March 2016
Fast Computation Using High Radix Signed Digit Number with Different Adders
Mahendra Prasad Sharma
Abstract: - The proposed system is an efficient implementation of 16-bit Multiplier- Accumulator using Radix-8 and Radix-16 Modified Booth Algorithm and seven different adders (SPST Adder, Parallel Prefix Adder, Carry Select Adder, Error Tolerant Adder, Hybrid Pref
Keywords: Radix-8 modified booth algorithm Radix -16 modified booth algorithm, Digital Signal Processing, VHDL
Edition: Volume 5 Issue 3, March 2016,
Pages: 511 - 518