International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


Downloads: 123 | Views: 176

Review Papers | Electronics & Communication Engineering | India | Volume 5 Issue 1, January 2016


VLSI Based Robust Router Architecture

Pramod Kulkarni [2] | M. N. Karanjkar [2]


Abstract: In this paper, we introduce networking solution by using VLSI architecture techniques to router design for networking system to provide control over the network. We attempts to overcome latency and time reduction issue and can provide multipurpose networking router by means of verilog and it was synthesized in Xilinx 13.2 version, simulated Modelsim 10.0 version. The approach enables the router to process mul-tiple incoming IP packets with different versions of protocols simultaneously, e. g. for IPv4 and IPv6.


Keywords: verifying Router Protocol Verilog


Edition: Volume 5 Issue 1, January 2016,


Pages: 770 - 772


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