International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


Downloads: 114 | Views: 259

M.Tech / M.E / PhD Thesis | Electronics & Communication Engineering | India | Volume 3 Issue 4, April 2014 | Popularity: 6.8 / 10


     

Design and Analysis of Effective Coding Technique for Serial Links

M. Chennakesavulu, A. Raghavi


Abstract: Serial link interconnection has been implemented for its advantages of reducing crosstalk and area. However, serializing parallel buses tends to increase bit transition and power dissipation. Several coding schemes, such as serial followed by encoding (SE) and transition inversion coding (TIC), have been proposed to reduce bit transition. TIC is capable of decreasing transitions by 15 % compared to the SE scheme, but an extra indication bit is added in every data word to represent inversion occurrence. The extra bit increases the transmission overhead and the bit transitions. This paper proposes an embedded transition inversion (ETI) coding scheme that uses the phase difference between the clock and data in the transmitted serial data to tackle the problem of the extra indication bit. Proposed coding scheme is design and implemented using Xlink tool. power is calculated using Xpower and result shows that ETI consumes 52 (mw) power and TIC consumes 65.2 (mw) power. it shows that ETI is optimized technique than the TIC.


Keywords: Coding techniques, phase detector, serial link, B21V inverter, check transition


Edition: Volume 3 Issue 4, April 2014


Pages: 760 - 764



Make Sure to Disable the Pop-Up Blocker of Web Browser




Text copied to Clipboard!
M. Chennakesavulu, A. Raghavi, "Design and Analysis of Effective Coding Technique for Serial Links", International Journal of Science and Research (IJSR), Volume 3 Issue 4, April 2014, pp. 760-764, https://www.ijsr.net/getabstract.php?paperid=27041402



Similar Articles

Downloads: 115

Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 4, April 2015

Pages: 1391 - 1395

A New Methodology for Reducing Switching Activity in Serial Links of SoC

Binny P. Yohannan, Ajeesh A.V.

Share this Article

Downloads: 122

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 482 - 486

Design of Fixed Latency Serial Transceiver on FPGA

Mallika Patil

Share this Article

Downloads: 139

Research Paper, Electronics & Communication Engineering, India, Volume 2 Issue 12, December 2013

Pages: 44 - 49

Design and Analysis of Energy Efficient Semi-Serial Link for On-Chip Communication

M. Chennakesavulu, J. Raghu

Share this Article

Downloads: 140

Research Paper, Electronics & Communication Engineering, India, Volume 2 Issue 11, November 2013

Pages: 117 - 120

A Robust UART Implementation for Industrial Applications on FPGA

Nagaraju. A, S. Nagi Reddy

Share this Article

Downloads: 154

Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 1, January 2015

Pages: 26 - 31

Online Case Study On Phase Frequency Detector

Ashwini Rajole

Share this Article



Top