Downloads: 114 | Views: 293 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1
Review Papers | Electronics & Communication Engineering | India | Volume 3 Issue 6, June 2014 | Popularity: 6.3 / 10
Digital Multipliers: A Review
Jyoti Sharma, Sachin Kumar
Abstract: Multiplication is one of the basic functions used in digital signal processing (DSP). Hardware resources and processing time required by it are more than addition and subtraction. There are two kinds of multiplication algorithms; serial multiplication algorithms and parallel Multiplication algorithms. Serial multiplication algorithms use sequential circuits with feedbacks. Parallel multiplication algorithms often use combinational circuits; and do not contain feedback structures. This paper presents various multiplier architectures. Multiplier architectures fall generally into two categories i. e. ; tree multipliers and array multipliers. Tree multipliers add as many partial products in parallel as possible and therefore; are very high performance architectures. Multiplication operation involves generation of partial products and their accumulation. The speed of multiplication can be increased by reducing the number of partial products.
Keywords: Architecture, Digital system, Hardware, Logic functions, Propagation delay, Sequentially
Edition: Volume 3 Issue 6, June 2014
Pages: 741 - 743
Make Sure to Disable the Pop-Up Blocker of Web Browser
Similar Articles
Downloads: 195 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1
Informative Article, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015
Pages: 188 - 191Realization of Smart City Using 5G Cognitive Radio
Lalit Chettri, Syed Sazad
Downloads: 128 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1
Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 3, March 2014
Pages: 108 - 112Design and Simulation of Four Stage Pipelining Architecture Using the Verilog
Rakesh M. R
Downloads: 136
Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 11, November 2016
Pages: 422 - 426An Segmentation Under Connected Components Based on Watershed Algorithm Using FPGA Processor
R. Kiruthikaa, S. Salaiselvapathy
Downloads: 0
Review Papers, Electronics & Communication Engineering, India, Volume 11 Issue 12, December 2022
Pages: 155 - 160Securing Data with Blockchain and AI
Kamisetty Vinay
Downloads: 1 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1
Masters Thesis, Electronics & Communication Engineering, India, Volume 11 Issue 7, July 2022
Pages: 1015 - 1019A High Performance Data Encryption and Masking Using AES Algorithm
Poornima TN, Dr. Somashekar K