International Journal of Science and Research (IJSR)
Communication Engineering
Downloads: 132 | Views: 798
Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015
Pages: 1525 - 1530A Clock Gating Technique Using Auto Gated Flip Flop for Look Ahead Clock Gating
Mayuri B. Junghare | Aparna S. Shinde
Downloads: 132 | Views: 748
Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015
Pages: 2343 - 2348Principle Component Analysis to Recognize Face, Iris and Finger Print Image
Kalpana D. Wani
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Electronics & Communication Engineering, Sudan, Volume 4 Issue 8, August 2015
Pages: 722 - 725Vertical Handover in Long Term Evaluation (LTE)
Asia Mohammed Abd Algader Albosatey | Ashraf Gasim Elsid | Amin Babiker A/Nabi
Downloads: 132 | Views: 980
Electronics & Communication Engineering, India, Volume 4 Issue 9, September 2015
Pages: 1799 - 1802Single Phase Clock Distribution using Low Power VLSI Technology
Krishna Naik Dungavath | Dr V. Vijayalakshmi
Downloads: 132 | Views: 854
Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015
Pages: 309 - 312Performance of Generic and Recursive Pseudo Exhaustive Two-Pattern Generator
Akanksha Pandey | Pravin Tiwari
Downloads: 132 | Views: 733
Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015
Pages: 416 - 420Maximizing the Lifetime & Collision Avoidance for Wireless Sensor Network
Rashmi D. Naukarkar | Prof. Mangesh N. Thakare | Prof. Bhawna J. Chilke
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Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015
Pages: 923 - 928A Modified NoC Router Architecture with Fixed Priority Arbiter
Surumi Ansari | Suranya G
Downloads: 132 | Views: 859
Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015
Pages: 1025 - 1029Design and Analysis of Dynamic Comparator with Reduced Power and Delay
Shashank Shekhar | Dr. S. R. P. Sinha
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Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015
Pages: 2383 - 2388Design and Analysis of Dynamic Current Mode Full Adder with reduced Power and Delay
Dr. S.R.P. Sinha | Namita Tiwari
Downloads: 132 | Views: 897
Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015
Pages: 2423 - 2426LabView Interface with Arduino Robotic ARM
B. Harish | U. Jyothsna