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Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016
Pages: 1270 - 1274Design and Analysis of Full Adder Using Adiabatic Logic
Durgesh Patel, Dr. S. R. P. Sinha
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International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed
ISSN: 2319-7064