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Research Paper | Electronics & Communication Engineering | India | Volume 4 Issue 6, June 2015
Wide Range Enable Level Shifter for Multi-Supply Voltage Designs
Puneet Patil | D Sheshachalam
Abstract: In the current SoC design methodologies, the multi supply voltage and power gating techniques are used widely which require special cells in design. A new enable level shifter is designed which comprises the function of level shifter and isolation cell. The voltage level shifting is achieved by the use of modified Wilson current mirror circuits, which gives wide range of input voltage. In the given ELS, the output will be clamped to ground when the enable signal is high i. e. during the power domain shut down. This avoids the false triggering of transistors in the subsequent blocks. The proposed ELS is designed using SPICE model of 32nm technology and simulated. The ELS can reliably convert 100mV input voltage to 0.9V, with the delay of 5ns. The power consumption of the cell is 100nW at 0.9V input voltage.
Keywords: multi voltage supply design, dynamic voltage scaling, power gating, isolation cells, modified Wilson current mirror, ELS, SPICE
Edition: Volume 4 Issue 6, June 2015,
Pages: 987 - 991
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Research Paper, Electronics & Communication Engineering, India, Volume 11 Issue 5, May 2022
Pages: 1837 - 1841Leakage Reduction Technique for Scan Flip-Flop
Nayini Bhavani | Rahul D [14] | Bhavani Kiranmai | J. Yeshwanth Reddy
Downloads: 110
Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 8, August 2014
Pages: 1731 - 1733Leakage Power Reduction in CMOS XOR Full Adder Using Power Gating With GDI Technique
Piyush Sharma [3] | Ghanshyam Jangid [6]