Downloads: 120
Survey Paper | Electronics & Communication Engineering | India | Volume 2 Issue 4, April 2013
A Survey of HDLC Controllers
S. D. Samudra | S. P. Gaikwad [2]
Abstract: HDLC is an efficient protocol defined in the layer 2 of OSI model. HDLC is a group of protocols for transmitting synchronous data over a point-to-point link. Many chips have been designed for HDLC controllers. Not all the features of the controller are always needed. Due to the advantages of FPGA, controller chips are being designed according to the needs of system. This paper discusses the design and implementation of some such HDLC controllers.
Keywords: HDLC controller, FPGA, CRC, customization
Edition: Volume 2 Issue 4, April 2013,
Pages: 218 - 220
Similar Articles with Keyword 'FPGA'
Downloads: 136
Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 11, November 2016
Pages: 422 - 426An Segmentation Under Connected Components Based on Watershed Algorithm Using FPGA Processor
R. Kiruthikaa [3] | S. Salaiselvapathy
Downloads: 0
Research Paper, Electronics & Communication Engineering, India, Volume 11 Issue 2, February 2022
Pages: 313 - 315