International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


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Research Paper | Electrical Engineering | India | Volume 3 Issue 6, June 2014


Modelling of Dynamic Voltage Restorer for Mitigation of Voltage Sag and Swell Using Phase Locked Loop

Deepa Patil [3] | Datta Chavan [2]


Abstract: Voltage variations such as sag and swells in the distribution system effects sensitive loads. For protection of electric circuitry and sensitive equipments dynamic voltage restorers are implemented. Dynamic Voltage Restorer (DVR) is modelled using Matlab Simulation program and using basic circuit analysis in this paper. Control scheme applied for modelling is bases on phase locked loop. Performance of DVR is presented with the help of simulation results under sag and swell conditions.


Keywords: DVR, SPLL, Sag, Swell


Edition: Volume 3 Issue 6, June 2014,


Pages: 2137 - 2143


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How to Cite this Article?

Deepa Patil, Datta Chavan, "Modelling of Dynamic Voltage Restorer for Mitigation of Voltage Sag and Swell Using Phase Locked Loop", International Journal of Science and Research (IJSR), Volume 3 Issue 6, June 2014, pp. 2137-2143, https://www.ijsr.net/get_abstract.php?paper_id=2014685

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