Research Paper | Electronics & Communication Engineering | India | Volume 4 Issue 8, August 2015
High performance Radix-4 FFT using Parallel Architecture
Pooja Swamy, R. Pavan Kumar
In this paper, we propose a design architecture of an efficient Radix-4 FFT algorithm using parallel architecture. This parallel architecture plays an important role in the FFT computation speed of data samples. The proposed algorithm has a better power and area consumption compared to the conventional Radix-4 FFT Algorithm. By the repeated use of twiddle factors, algorithm reduces the complexity and memory consumption in terms of hardware point of view.
Keywords: DIF, DIT, FFT, DFT
Edition: Volume 4 Issue 8, August 2015
Pages: 1185 - 1187
How to Cite this Article?
Pooja Swamy, R. Pavan Kumar, "High performance Radix-4 FFT using Parallel Architecture", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=SUB157500, Volume 4 Issue 8, August 2015, 1185 - 1187
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