International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Most Trusted Research Journal Since Year 2012

ISSN: 2319-7064



M.Tech / M.E / PhD Thesis | Electronics & Communication Engineering | India | Volume 4 Issue 7, July 2015

Circuit under Test Verification with MSIC Test Pattern Generator

Parvathy Chandra, Vishnu V. S.

Improvement in quality and reliability are required for digital circuits as their complexity and density increases. Validation of VLSI circuits becomes more difficult with higher test cost. Built-In-Self-Test (BIST) techniques can effectively reduce complexity of VLSI testing, by the introduction of on-chip test hardware into the Circuit Under Test (CUT). In BIST architectures, the Test Pattern Generator (TPG) uses Linear Feedback Shift Register (LFSR) which generates pseudo random patterns that increases the switching activity of test patterns. The test pattern generator generates a multiple single input change (MSIC) vector which increases the accuracy of test response. The Single Input Change (SIC) vector generator uses a reconfigurable Johnson counter to generate minimum transition sequences. The TPG is used in test-per-scan scheme. A combinational circuit is used as the circuit under test, and the output response of CUT is stored in Look Up Table (LUT) for error comparison in LUT method of verification. Reversible technique is also used for the testing the circuit under test. The system is simulated using Xilinx 13.2 design suite.

Keywords: BIST, CUT, LFSR, MSIC

Edition: Volume 4 Issue 7, July 2015

Pages: 2374 - 2378


How to Cite this Article?

Parvathy Chandra, Vishnu V. S., "Circuit under Test Verification with MSIC Test Pattern Generator", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=SUB157027, Volume 4 Issue 7, July 2015, 2374 - 2378

22 PDF Views | 23 PDF Downloads

Download Article PDF



Similar Articles with Keyword 'BIST'

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 5 Issue 5, May 2016

Pages: 2286 - 2288

Realization of Programmable PRPG with Enhanced Fault Coverage Gradient

Lakshmi Asokan, Jeena Maria Cherian

Share this article

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015

Pages: 2561 - 2564

Statistical Simulation for BIST Architecture using Cognitive Principles

Shradha Khemka

Share this article

Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015

Pages: 1937 - 1941

Re-Configurable Built In Self Repair scheme in Ram for Yield Improvement

Tessy M John, Dhanya Oommen

Share this article

Review Papers, Electronics & Communication Engineering, India, Volume 4 Issue 12, December 2015

Pages: 1294 - 1297

Weighted Random Pattern Generator by Using BIST

Rajni Gajendra, Rahul Gedam

Share this article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 2374 - 2378

Circuit under Test Verification with MSIC Test Pattern Generator

Parvathy Chandra, Vishnu V. S.

Share this article



Similar Articles with Keyword 'CUT'

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015

Pages: 1335 - 1340

Robust Segmentation and Classification of Histopathological Image

Jincy Wilson, Vipin V. R.

Share this article

Research Paper, Electronics & Communication Engineering, Sudan, Volume 5 Issue 2, February 2016

Pages: 1825 - 1830

Implementation of Mobile Agent in African Countries

Yassin Abdulkarim Hamdalla, Osama Ali Abdelgadir, Makkawi Abdelsalam Mohamedkheir, Mohammed Altayeb Ahmed

Share this article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 2482 - 2487

Robust Recovery of Data in Multiple Sink Wireless Sensor Network

Jyothi.K, Sridhar K

Share this article

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1927 - 1930

An Efficient Implementation of the LMS Adaptive Algorithm

Sampath Kumar Dara, Kaparthy Uday

Share this article

Survey Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1964 - 1970

A Review on Optical Character Recognition and Text to Speech Conversion

Swati Vikas Kodgire, G. S. Sable

Share this article



Similar Articles with Keyword 'LFSR'

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 5 Issue 5, May 2016

Pages: 2286 - 2288

Realization of Programmable PRPG with Enhanced Fault Coverage Gradient

Lakshmi Asokan, Jeena Maria Cherian

Share this article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015

Pages: 1865 - 1868

DPA Resistant AES Using a True Random Based LFSR Technique

Reenu Tomy, Vinoj P.G.

Share this article

Review Papers, Electronics & Communication Engineering, India, Volume 4 Issue 12, December 2015

Pages: 1294 - 1297

Weighted Random Pattern Generator by Using BIST

Rajni Gajendra, Rahul Gedam

Share this article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 2374 - 2378

Circuit under Test Verification with MSIC Test Pattern Generator

Parvathy Chandra, Vishnu V. S.

Share this article

Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015

Pages: 1673 - 1676

Functional Broadside Test Generation for Fault Analysis

Greeshma U. R., Sarath Raj S.

Share this article
Top