Statistical Simulation for BIST Architecture using Cognitive Principles
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064

Research Paper | Electronics & Communication Engineering | India | Volume 4 Issue 5, May 2015

Statistical Simulation for BIST Architecture using Cognitive Principles

Shradha Khemka

In this paper, we have used the concept of cognitive radio networks to estimate optimum error probability for the estimation of failure rate inBIST (built in self test) architecture. In this work primarily the problem of BIST has been dealt from the point of view of probability theorem especially central limit theorem and chi square distribution. Earlier this work has been used to estimate the probability distribution for cognitive radio technology. Now our effort underlies its use in BIST analysis. In BIST architecture usually we face a tradeoff in between no. of gates used in the BIST, the probability of false alarm i.e. whether the read write generated is true or not, probability of detection which shows that whether the particular memory prone has been successfully tested. Thus this project work focuses on the use of cognitive radio principles for estimation of read/write error in testing any type of memory. The project work will result in the finding of a tradeoff between optimum probability of false alarm and probability of detection for a general BIST in consideration.

Keywords: BIST, VLSI, statistical analysis, cognitive radios, montecarlo simulation

Edition: Volume 4 Issue 5, May 2015

Pages: 2561 - 2564

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Shradha Khemka, "Statistical Simulation for BIST Architecture using Cognitive Principles", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=SUB152811, Volume 4 Issue 5, May 2015, 2561 - 2564

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