Detect and Correct Single Event Upset of the AES Algorithm in On Board Satellite
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064

Downloads: 110

Research Paper | Electronics & Communication Engineering | India | Volume 3 Issue 9, September 2014

Detect and Correct Single Event Upset of the AES Algorithm in On Board Satellite

Md. Riyaj, Vipin Gupta

The AES cryptography algorithm can be used to encrypt /decrypt blocks of 128 bits and is capable of using cipher keys of 128, 196 or 256 bits wide (AES 128, AES 196 and AES 256). The AES can be implemented in either software or hardware. The AES is a symmetric key algorithm in which both the sender and the receiver use a single key for encryption & decryption. The encrypted satellite data can get corrupted before reaching the ground station due to various faults. One major source of fault is the harsh radiation environment, Therefore any electronic system used on board satellites such as processors; memories are very susceptible to faults induced by radiation. In this paper we analysis the propagation of faults that occur during transmission due to noise is carried out in order to avoid data corruption and faults are rectified by using hamming Error correction code algorithm. This reduces the data corruption and increases the performances as a result

Keywords: AES, DES, SEU, TWOFISH

Edition: Volume 3 Issue 9, September 2014

Pages: 1062 - 1066

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How to Cite this Article?

Md. Riyaj, Vipin Gupta, "Detect and Correct Single Event Upset of the AES Algorithm in On Board Satellite", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=SEP14218, Volume 3 Issue 9, September 2014, 1062 - 1066

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