High Speed Vedic Multiplier for 16 Bits Numbers
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064



Downloads: 115

M.Tech / M.E / PhD Thesis | Electronics & Communication Engineering | India | Volume 3 Issue 11, November 2014

High Speed Vedic Multiplier for 16 Bits Numbers

M. Narasimharao, R. V. Shashanka

- Speed and occupational area are key in RISCs (Reduced Instruction Set Computers), DSPs (Digital Signal Processors). Knowing that most of the operations involved in processing signal are multiplications since fundamental process in communication modula

Keywords: Compressor, array, Booths multiplier, Urdhwa Tiryakbhyam Sutra, Vedic Mathematics

Edition: Volume 3 Issue 11, November 2014

Pages: 1672 - 1676

Share this Article

How to Cite this Article?

M. Narasimharao, R. V. Shashanka, "High Speed Vedic Multiplier for 16 Bits Numbers", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=OCT141099, Volume 3 Issue 11, November 2014, 1672 - 1676

Enter Your Email Address




Similar Articles with Keyword 'Compressor'

Downloads: 105

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 6, June 2015

Pages: 1527 - 1531

Design of High Speed 32 Bit Multiplier Architecture Using Vedic Mathematics and Compressors

Deepak Kurmi, V. B. Baru

Share this Article

Downloads: 105

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 4, April 2016

Pages: 2433 - 2438

A Novel Design of Low Power 4:2 Compressor using Adiabatic Logic

Shaswat Singh Bhardwaj, Vishal Moyal

Share this Article

Similar Articles with Keyword 'array'

Downloads: 1 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 97

Research Paper, Electronics & Communication Engineering, India, Volume 9 Issue 12, December 2020

Pages: 267 - 270

Self Powered Nanopiezoelectric Device Based on ZnO Nanorod Array on Flexible Conjugated Copolymer Hybrid

Elsa Sneha Thomas

Share this Article

Similar Articles with Keyword 'Vedic Mathematics'

Downloads: 61 | Monthly Hits: ⮙1

Masters Thesis, Electronics & Communication Engineering, India, Volume 9 Issue 12, December 2020

Pages: 1042 - 1046

Renovated 32 Bit ALU Using Hybrid Techniques

Manju Davis, Uma N

Share this Article

Downloads: 103

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015

Pages: 3221 - 3230

Implementation of RSA Cryptosystem Using Ancient Indian Vedic Mathematics

Shahina M. Salim, Sonal A. Lakhotiya

Share this Article



Top