Interfacing between High Performance Drivers and Low Power Devices using ABP Bridge
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064

Views: 136 , Downloads: 114 | CTR: 84 % | Weekly Popularity: ⮙2

Research Paper | Electronics & Communication Engineering | India | Volume 2 Issue 4, April 2013

Interfacing between High Performance Drivers and Low Power Devices using ABP Bridge

N. Sudhakar, M. Kiran Kumar

ARM introduced the Advanced Micro controller Bus Architecture (AMBA) 4.0 specifications in March 2010, which includes Advanced extensible Interface (AXI) 4.0. AMBA bus protocol has become the de facto standard SoC bus. That means more and more existing IPs must be able to communicate with AMBA 4.0 buses. Based on AMBA 4.0 bus, we designed an Intellectual Property (IP) core of Advanced Peripheral Bus (APB) bridge, it can translates the AXI4.0- lite transactions into APB 4.0 transactions. The bridge provides an interface between the high-performance AXI bus and low-power APB domain.

Keywords: SoC, AMBA, AXI, APB, Advanced Micro controller Bus Architecture

Edition: Volume 2 Issue 4, April 2013

Pages: 157 - 159

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N. Sudhakar, M. Kiran Kumar, "Interfacing between High Performance Drivers and Low Power Devices using ABP Bridge", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=IJSRON2013674, Volume 2 Issue 4, April 2013, 157 - 159

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