FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064



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Research Paper | Electronics & Communication Engineering | India | Volume 7 Issue 5, May 2018

FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel

Suma Gurulingaiah Charantimath, Ravi S M

Applicable in different fields and markets, low energy high efficiency video coding (HEVC) codecs and their constituting elements have been heavily studied. Fractional pixel interpolation is one of its most costly blocks. In this work, a field programmable gate array implementation of HEVC fractional pixel interpolation, outperforming literature solutions, is proposed. Approximate computing, in conjunction with hardware reconfiguration, guarantees a tunable interpolation system offering energy versus quality tradeoff to further reduce energy.

Keywords: Embedded applications, field programmable gate array FPGA, FIR filters, low power architectures, low power design, reconfigurable computing, runtime reconfiguration, signal processing

Edition: Volume 7 Issue 5, May 2018

Pages: 405 - 408

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How to Cite this Article?

Suma Gurulingaiah Charantimath, Ravi S M, "FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=ART20182184, Volume 7 Issue 5, May 2018, 405 - 408

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