International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064




Downloads: 133 | Views: 145

Research Paper | Electronics & Communication Engineering | India | Volume 7 Issue 5, May 2018


FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel

Suma Gurulingaiah Charantimath | Ravi S M


Abstract: Applicable in different fields and markets, low energy high efficiency video coding (HEVC) codecs and their constituting elements have been heavily studied. Fractional pixel interpolation is one of its most costly blocks. In this work, a field programmable gate array implementation of HEVC fractional pixel interpolation, outperforming literature solutions, is proposed. Approximate computing, in conjunction with hardware reconfiguration, guarantees a tunable interpolation system offering energy versus quality tradeoff to further reduce energy.


Keywords: Embedded applications, field programmable gate array FPGA, FIR filters, low power architectures, low power design, reconfigurable computing, runtime reconfiguration, signal processing


Edition: Volume 7 Issue 5, May 2018,


Pages: 405 - 408


How to Download this Article?

Type Your Email Address below to Download the Article PDF


How to Cite this Article?

Suma Gurulingaiah Charantimath, Ravi S M, "FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel", International Journal of Science and Research (IJSR), Volume 7 Issue 5, May 2018, pp. 405-408, https://www.ijsr.net/get_abstract.php?paper_id=ART20182184



Similar Articles with Keyword 'Embedded applications'

Downloads: 127

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 8, August 2015

Pages: 221 - 224

Multi Video Processing on Embedded Platform

Prasannakumar M Vaggi

Share this Article

Downloads: 130

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015

Pages: 1986 - 1989

Two Transistor XOR Gate Based Single Bit-Full Adder Design for Embedded Applications

Korra Ravi Kumar | O. Ravinder

Share this Article



Top