International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064




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Research Paper | Electronics & Communication Engineering | India | Volume 6 Issue 2, February 2017


Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes

M. Nizamuddin


Abstract: In Analog to digital convertor design converter, high speed comparator influences the overall performance of Analog to Digital Converter (ADC) directly. This paper presents the CMOS comparator for effective ADC at low power dissipation. A schematic design of this comparator is given with 1m Technology and simulated in HSPICE. Simulation results are presented and the design has DC Gain of 68dB, power dissipation of 1.25 mW at 5 V for 1um and the design has DC Gain of 18dB, power dissipation of 325 mW at 1.2V for 45 nm using HSPICE software.


Keywords: Comparator, ADC, Low Power, CMOS, Simulation, Design


Edition: Volume 6 Issue 2, February 2017,


Pages: 1658 - 1662


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How to Cite this Article?

M. Nizamuddin, "Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes", International Journal of Science and Research (IJSR), Volume 6 Issue 2, February 2017, pp. 1658-1662, https://www.ijsr.net/get_abstract.php?paper_id=ART2017919



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