Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064

Research Paper | Electronics & Communication Engineering | India | Volume 6 Issue 2, February 2017

Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes

M. Nizamuddin

In Analog to digital convertor design converter, high speed comparator influences the overall performance of Analog to Digital Converter (ADC) directly. This paper presents the CMOS comparator for effective ADC at low power dissipation. A schematic design of this comparator is given with 1m Technology and simulated in HSPICE. Simulation results are presented and the design has DC Gain of 68dB, power dissipation of 1.25 mW at 5 V for 1um and the design has DC Gain of 18dB, power dissipation of 325 mW at 1.2V for 45 nm using HSPICE software.

Keywords: Comparator, ADC, Low Power, CMOS, Simulation, Design

Edition: Volume 6 Issue 2, February 2017

Pages: 1658 - 1662

Share this Article

How to Cite this Article?

M. Nizamuddin, "Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=ART2017919, Volume 6 Issue 2, February 2017, 1658 - 1662

108 PDF Views | 89 PDF Downloads

Download Article PDF



Similar Articles with Keyword 'Comparator'

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 5, May 2014

Pages: 671 - 674

A 1.8V 8-bit 100-MS/s Pipeline ADC in 0.18?m CMOS Technology

Bharti D.Chaudhari, Priyesh P. Gandhi

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 6 Issue 2, February 2017

Pages: 1658 - 1662

Comparative Analysis of CMOS Comparator for A-D Converter at 1um and 45 nm Technology Nodes

M. Nizamuddin

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015

Pages: 1025 - 1029

Design and Analysis of Dynamic Comparator with Reduced Power and Delay

Shashank Shekhar, Dr. S. R. P. Sinha

Share this Article

Review Papers, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015

Pages: 1543 - 1546

Review of Different Types of Power Efficient Flash Type ADC

Ashish Kumar, Deepak Mehra

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015

Pages: 204 - 207

Design of High Speed Digital CMOS Comparator Using Parallel Prefix Tree

N. Prasanna, H. Sumitha

Share this Article

Similar Articles with Keyword 'ADC'

Research Paper, Electronics & Communication Engineering, Nigeria, Volume 4 Issue 6, June 2015

Pages: 2024 - 2027

Refractivity Variation Effect on Radio Wave Propagation

Adegboyega Gabriel Adisa

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 5, May 2014

Pages: 671 - 674

A 1.8V 8-bit 100-MS/s Pipeline ADC in 0.18?m CMOS Technology

Bharti D.Chaudhari, Priyesh P. Gandhi

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015

Pages: 2436 - 2439

A Power Effective UWB Sensor Tag with Time Domain Sensor Interface and a Vivaldi Antenna as a Transceiver

Vishnu R. L.

Share this Article

Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 9, September 2015

Pages: 1672 - 1675

The Design of Multi Bit Quantizer Sigma-Delta Modulator Analog to Digital Converter

J. Snehalatha

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 11, November 2014

Pages: 1723 - 1726

Low Power Spectral Analysis for Built in Self Test by Using System on Chip

L. Maheswari, B. V. P. Prasad

Share this Article

Similar Articles with Keyword 'Low Power'

Informative Article, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015

Pages: 188 - 191

Realization of Smart City Using 5G Cognitive Radio

Lalit Chettri, Syed Sazad

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 8, August 2014

Pages: 481 - 483

Communication of Multi Mobile-Robots Based On ZigBee Network

Taskeen Sultana, Zeenath

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 1180 - 1185

A Fast-Locking All-Digital Deskew Buffer with DCC using Digital-Controlled Delay Line

A.Ashwini, H. Shravan Kumar

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 3, March 2015

Pages: 2158 - 2160

Analysis of Implicit Type Pulse Triggered Flip Flop

Richa Srivastav, Dinesh Chandra, Sumit Khandelwal

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 6, June 2015

Pages: 878 - 884

ASIC Architectures for Implementing ECC Arithmetic over Finite Fields

Hemanth Ravindra, Jalaja S

Share this Article

Similar Articles with Keyword 'CMOS'

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 8, August 2014

Pages: 481 - 483

Communication of Multi Mobile-Robots Based On ZigBee Network

Taskeen Sultana, Zeenath

Share this Article

Research Paper, Electronics & Communication Engineering, Sudan, Volume 3 Issue 7, July 2014

Pages: 1756 - 1759

Verification of a Readout Design for Multiple Energy Discrimination working in Single Photon Processing Pixel Array

Suliman Abdalla, Bengt Oelmman, Amin Babiker

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 5, May 2014

Pages: 671 - 674

A 1.8V 8-bit 100-MS/s Pipeline ADC in 0.18?m CMOS Technology

Bharti D.Chaudhari, Priyesh P. Gandhi

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 9, September 2015

Pages: 257 - 260

Low Phase Noise Ring Oscillator Using Current Steering Technique

G. Gopal, Sri M. Madhusudhan Reddy

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015

Pages: 1205 - 1210

A Novel Low power and Area Efficient Carry-Lookahead Adder Using MOD-GDI Technique

Pinninti Kishore, P. V. Sridevi, K. Babulu, K.S Pradeep Chandra

Share this Article

Similar Articles with Keyword 'Simulation'

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 3, March 2014

Pages: 108 - 112

Design and Simulation of Four Stage Pipelining Architecture Using the Verilog

Rakesh M. R

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 9 Issue 10, October 2020

Pages: 924 - 929

A Novel Approach to Reduce the Handover Probabilities due to Wrong Decision

Shweta Patil, Mohammed Bakhar, Pallavi Biradar

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 8, August 2014

Pages: 1471 - 1476

HMAC Based Secure Authentication of VANETs

Swagat. S. Gudagudi, Dr. Veena Desai

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 4, April 2014

Pages: 818 - 823

Designing of Bandwidth Improved h Shaped Microstrip Patch Antenna for Bluetooth Applications Using Ansoft HFSS

Chaitali J. Ingale, Anand. K. Pathrikar

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1827 - 1829

Enhancement of Speech Signal Corrupted by Impulsive Noise Using Rank Order Mean

Arun Kumar Singh, Prof. Neelam Srivastava, Er. Piyush Singh

Share this Article

Similar Articles with Keyword 'Design'

Informative Article, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015

Pages: 188 - 191

Realization of Smart City Using 5G Cognitive Radio

Lalit Chettri, Syed Sazad

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 3, March 2014

Pages: 108 - 112

Design and Simulation of Four Stage Pipelining Architecture Using the Verilog

Rakesh M. R

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 2, February 2021

Pages: 600 - 606

Design of Optimized PID Controller for Blood Glucose Level Using CSA

Shubham Singh, Amrit Kaur Bhullar

Share this Article

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 8, August 2014

Pages: 481 - 483

Communication of Multi Mobile-Robots Based On ZigBee Network

Taskeen Sultana, Zeenath

Share this Article

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 9 Issue 7, July 2020

Pages: 576 - 579

Software Loading and Testing Facility for DMC

V. Abinaya, Girish H.

Share this Article
Top