Novel Design of Low Power Nonvolatile 10T1R SRAM Cell
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064



Downloads: 110

M.Tech / M.E / PhD Thesis | Electronics & Communication Engineering | India | Volume 6 Issue 11, November 2017

Novel Design of Low Power Nonvolatile 10T1R SRAM Cell

Vani Tripathi, Bhawna Trivedi

Power is a major issue in today's system on chip design at deep submicron. It is very important to control power dissipation in cache memories because 70 % of chip area is covered by memory in microprocessors. Various low power circuits are proposed in the past for volatile memories to alleviate the problem of power dissipation. However in today's era nonvolatile SRAMs (NVSRAMs) are being proposed to restore data along with faster access after power off operation. This paper proposes a nonvolatile Low power 10T1R SRAM cell. The proposed non volatile SRAM cell comprises a conventional 6T SRAM cell, memristor with 1 Transistor, USL technique comprising of 3 transistors, thus making a 10T-1R SRAM Cell. The proposed cell operates in three modes namely write, power off and restore. By simulating the proposed design, the power dissipation has reduced substantially. Experimental results shows that various parameters such as power, delay, power delay product and leakage current has also improved compared to the previous work. The work is done in cadence virtuoso tool at 45nm technology using GDPK045 library with supply voltage Vdd=1V

Keywords: NVSRAM, Upper Switch level, leakage current, power, delay

Edition: Volume 6 Issue 11, November 2017

Pages: 2142 - 2145

Share this Article

How to Cite this Article?

Vani Tripathi, Bhawna Trivedi, "Novel Design of Low Power Nonvolatile 10T1R SRAM Cell", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=ART20178498, Volume 6 Issue 11, November 2017, 2142 - 2145

Enter Your Email Address




Similar Articles with Keyword 'leakage current'

Downloads: 101

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 8, August 2015

Pages: 1597 - 1602

Design Of 7T SRAM Cell Using Self-Controllable Voltage Level Circuit to Achieve Low Power

Vema Vishnu Priya, G.Ramesh

Share this Article

Downloads: 108

Comparative Studies, Electronics & Communication Engineering, India, Volume 3 Issue 7, July 2014

Pages: 764 - 767

Design Low Power 10t and Comparison 16t, 14t and 11t Full Adder Using Invariant Parameter at 45nm Technology

Umashankar Dhepra, Rajkumar Gehlot

Share this Article

Similar Articles with Keyword 'power'

Downloads: 182

Informative Article, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015

Pages: 188 - 191

Realization of Smart City Using 5G Cognitive Radio

Lalit Chettri, Syed Sazad

Share this Article

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 6, June 2021

Pages: 1505 - 1508

Design of Two Stage CMOS Operational Amplifier

Rahul Kumar

Share this Article

Similar Articles with Keyword 'delay'

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 61 | Monthly Hits: ⮙1

Masters Thesis, Electronics & Communication Engineering, India, Volume 9 Issue 12, December 2020

Pages: 1042 - 1046

Renovated 32 Bit ALU Using Hybrid Techniques

Manju Davis, Uma N

Share this Article



Top