International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Since Year 2012 | Open Access | Double Blind Reviewed

ISSN: 2319-7064




Downloads: 112

Research Paper | Electronics & Communication Engineering | India | Volume 3 Issue 7, July 2014


Design and Implementation High Reliability PWM Modulator Using Triple Modular Redundancy with Spare Arrangement

Dikshant Khanke | Dr. P. B. Patil


Abstract: The proposed work describes the designing of PWM Modulator with increase reliability by triple modular redundancy with spare arrangement. The design, the synthesis, and the implementation of pulse width modulation (PWM) with increase reliability in Xilinx Field Programmable Gate Array (FPGA). The contribution of this proposed work will be the development of PWM Modulator in Xilinx Integrated System Environment (ISE) CAD tools and the VHDL modeling is used in the design process of PWM. The project develops high frequency PWM generator with increase reliability architecture on FPGA. The resulting FPGA frequency depends on the target FPGA speed grade and the duty cycle resolution requirements. In most industrial application due to the need of design integration in control systems, FPGA based PWM controller is advantageous over the other controller systems like microprocessor, microcontroller and so on. As geometries shrink and device counts multiply, opportunities abound to do incredible things within the confines of a single chip i. e. FPGA.


Keywords: PWM Modulator, triple modular redundancy with spare arrangement, FPGA, increase reliability


Edition: Volume 3 Issue 7, July 2014,


Pages: 1595 - 1597


How to Cite this Article?

Dikshant Khanke, Dr. P. B. Patil, "Design and Implementation High Reliability PWM Modulator Using Triple Modular Redundancy with Spare Arrangement", International Journal of Science and Research (IJSR), Volume 3 Issue 7, July 2014, pp. 1595-1597, https://www.ijsr.net/get_abstract.php?paper_id=24071401

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