International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064

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Review Papers | Electronics & Communication Engineering | India | Volume 3 Issue 6, June 2014

Digital Multipliers: A Review

Jyoti Sharma [11] | Sachin Kumar [11]

Abstract: Multiplication is one of the basic functions used in digital signal processing (DSP). Hardware resources and processing time required by it are more than addition and subtraction. There are two kinds of multiplication algorithms; serial multiplication algorithms and parallel Multiplication algorithms. Serial multiplication algorithms use sequential circuits with feedbacks. Parallel multiplication algorithms often use combinational circuits; and do not contain feedback structures. This paper presents various multiplier architectures. Multiplier architectures fall generally into two categories i. e. ; tree multipliers and array multipliers. Tree multipliers add as many partial products in parallel as possible and therefore; are very high performance architectures. Multiplication operation involves generation of partial products and their accumulation. The speed of multiplication can be increased by reducing the number of partial products.

Keywords: Architecture, Digital system, Hardware, Logic functions, Propagation delay, Sequentially

Edition: Volume 3 Issue 6, June 2014,

Pages: 741 - 743

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How to Cite this Article?

Jyoti Sharma, Sachin Kumar, "Digital Multipliers: A Review", International Journal of Science and Research (IJSR), Volume 3 Issue 6, June 2014, pp. 741-743,

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