A 3-Stage Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064



Downloads: 109

Review Papers | Electronics & Communication Engineering | India | Volume 3 Issue 7, July 2014

A 3-Stage Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform

Harshitha S, Gopalakrishna K

The discrete wavelet transform is used extensively in many fields, such as pattern recognition, image compression, speech analysis etc. because of its capability of decomposing a signal at multiple resolution levels. The 2-D Discrete Wavelet Transform is an operation through which a 2-D signal is successively decomposed in a spatial multi resolution domain by using low pass and high pass FIR filters along each of the dimensions. In this paper, we design and propose a scheme for high speed pipeline VLSI architecture for the computation of the 2-D discrete wavelet transform. Here the main focus is to develop an architecture that provides a high operating frequency and a small number of clock cycles along with efficient hardware utilization. This is done by maximizing the inter-stage and intra-stage computational parallelism for the pipeline. The inter-stage parallelism is improved by optimally mapping the computational task of multi decomposition levels to the stages of the pipeline and then synchronizing their operations. The intra-stage parallelism is improved by dividing the 2-D filtering operation into four subtasks that can be performed independently in parallel. In order validate the proposed scheme, the code is written for 8x8 input values, simulated, and implemented in FPGA for the 2-D DWT computation.

Keywords: Discrete wavelet transform, pattern recognition, FIR filter, parallel architecture, field programmable gate array

Edition: Volume 3 Issue 7, July 2014

Pages: 1391 - 1397

Share this Article

How to Cite this Article?

Harshitha S, Gopalakrishna K, "A 3-Stage Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=20141294, Volume 3 Issue 7, July 2014, 1391 - 1397

Enter Your Email Address




Similar Articles with Keyword 'Discrete wavelet transform'

Downloads: 95

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 2276 - 2281

Skin based Data hiding in Images by Using Haar and db2 DWT Techniques

Swapnali Zagade, Smita Bhosale

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1827 - 1829

Enhancement of Speech Signal Corrupted by Impulsive Noise Using Rank Order Mean

Arun Kumar Singh, Prof. Neelam Srivastava, Er. Piyush Singh

Share this Article

Similar Articles with Keyword 'pattern recognition'

Downloads: 108

Survey Paper, Electronics & Communication Engineering, India, Volume 3 Issue 11, November 2014

Pages: 1108 - 1112

Neuromorphic Circuits and its Various Applications: A Survey

Dayana Mathew, Jayesh George

Share this Article

Downloads: 108

Review Papers, Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015

Pages: 2156 - 2161

Analytical Review of Feature Extraction Technique for Automatic Speech Recognition

Sonam Pal, Jaikaran Singh

Share this Article

Similar Articles with Keyword 'FIR filter'

Downloads: 98 | Weekly Hits: ⮙2 | Monthly Hits: ⮙8

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015

Pages: 3033 - 3036

FIR Interpolation Filter for Multi-Standard Digital Up Converter Using FPGA

Chaithra M. R., Yashwanth N

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 2468 - 2472

VHDL Implementation for Adaptive FIR filter and its Novel Application using Systolic Architecture

Ghanshyam A. Chune, Vijay Bagdi

Share this Article

Similar Articles with Keyword 'parallel architecture'

Downloads: 106

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 8, August 2015

Pages: 1185 - 1187

High performance Radix-4 FFT using Parallel Architecture

Pooja Swamy, R. Pavan Kumar

Share this Article

Downloads: 109

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 11, November 2014

Pages: 2202 - 2204

FPGA Implementation of Motion Feature Extraction Employing Pipelined Architecture

M. Nivethitha, B. Venkataramanaiah

Share this Article

Similar Articles with Keyword 'field programmable gate array'

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 2468 - 2472

VHDL Implementation for Adaptive FIR filter and its Novel Application using Systolic Architecture

Ghanshyam A. Chune, Vijay Bagdi

Share this Article

Similar Articles with Keyword 'Discrete'

Downloads: 95

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 2276 - 2281

Skin based Data hiding in Images by Using Haar and db2 DWT Techniques

Swapnali Zagade, Smita Bhosale

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1827 - 1829

Enhancement of Speech Signal Corrupted by Impulsive Noise Using Rank Order Mean

Arun Kumar Singh, Prof. Neelam Srivastava, Er. Piyush Singh

Share this Article

Similar Articles with Keyword 'wavelet'

Downloads: 95

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 2276 - 2281

Skin based Data hiding in Images by Using Haar and db2 DWT Techniques

Swapnali Zagade, Smita Bhosale

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 6, June 2016

Pages: 1827 - 1829

Enhancement of Speech Signal Corrupted by Impulsive Noise Using Rank Order Mean

Arun Kumar Singh, Prof. Neelam Srivastava, Er. Piyush Singh

Share this Article

Similar Articles with Keyword 'transform'

Downloads: 134

Research Paper, Electronics & Communication Engineering, India, Volume 5 Issue 11, November 2016

Pages: 422 - 426

An Segmentation Under Connected Components Based on Watershed Algorithm Using FPGA Processor

R. Kiruthikaa, S. Salaiselvapathy

Share this Article

Downloads: 95

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 2276 - 2281

Skin based Data hiding in Images by Using Haar and db2 DWT Techniques

Swapnali Zagade, Smita Bhosale

Share this Article

Similar Articles with Keyword 'pattern'

Downloads: 94

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 4, April 2014

Pages: 818 - 823

Designing of Bandwidth Improved h Shaped Microstrip Patch Antenna for Bluetooth Applications Using Ansoft HFSS

Chaitali J. Ingale, Anand. K. Pathrikar

Share this Article

Downloads: 98

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 11, November 2015

Pages: 2397 - 2400

Design a Uplink-Downlink Reconfigurable Patch Antenna for Modern Space Application

Naman Mehrotra, Dr. K. M. Singh, Shashibhushan Sharma

Share this Article

Similar Articles with Keyword 'recognition'

Downloads: 152 | Monthly Hits: ⮙1

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 3, March 2015

Pages: 130 - 134

Segmentation of Touching Characters in Indian Scripts

B. Hari Kumar, N. Sateesh

Share this Article

Downloads: 0

Review Papers, Electronics & Communication Engineering, India, Volume 10 Issue 4, April 2021

Pages: 1349 - 1355

Review on CNN based Sign Language Recognition Methods

Akash Vijayan, Sajeena .A

Share this Article

Similar Articles with Keyword 'FIR'

Downloads: 29

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 10 Issue 3, March 2021

Pages: 1263 - 1265

Dense Fusion of Infrared and Visible Images

Gopika Ajay, H. Shihabudeen

Share this Article

Downloads: 96

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 6, June 2015

Pages: 992 - 995

ASIC Design of Sample Rate Convertor

Roopa M, H. Sudha

Share this Article

Similar Articles with Keyword 'filter'

Downloads: 127

Research Paper, Electronics & Communication Engineering, India, Volume 7 Issue 6, June 2018

Pages: 1662 - 1664

Enhancement of Gray Level Image by Fuzzy and Filter Technique

Monalisa Pandey, Pankaj Sharma

Share this Article

Downloads: 96

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 6, June 2015

Pages: 992 - 995

ASIC Design of Sample Rate Convertor

Roopa M, H. Sudha

Share this Article

Similar Articles with Keyword 'parallel'

Downloads: 121

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 3, March 2014

Pages: 108 - 112

Design and Simulation of Four Stage Pipelining Architecture Using the Verilog

Rakesh M. R

Share this Article

Downloads: 102

Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 7, July 2015

Pages: 2468 - 2472

VHDL Implementation for Adaptive FIR filter and its Novel Application using Systolic Architecture

Ghanshyam A. Chune, Vijay Bagdi

Share this Article

Similar Articles with Keyword 'architecture'

Downloads: 182

Informative Article, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015

Pages: 188 - 191

Realization of Smart City Using 5G Cognitive Radio

Lalit Chettri, Syed Sazad

Share this Article

Downloads: 121

Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 3, March 2014

Pages: 108 - 112

Design and Simulation of Four Stage Pipelining Architecture Using the Verilog

Rakesh M. R

Share this Article

Similar Articles with Keyword 'field'

Downloads: 0

Review Papers, Electronics & Communication Engineering, India, Volume 10 Issue 4, April 2021

Pages: 1349 - 1355

Review on CNN based Sign Language Recognition Methods

Akash Vijayan, Sajeena .A

Share this Article

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Similar Articles with Keyword 'programmable'

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 100

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 5 Issue 5, May 2016

Pages: 2286 - 2288

Realization of Programmable PRPG with Enhanced Fault Coverage Gradient

Lakshmi Asokan, Jeena Maria Cherian

Share this Article

Similar Articles with Keyword 'gate'

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 1

M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014

Pages: 1842 - 1847

A Novel Mac Based Congestion Control System for VANET with Adaptive Routing

Mahanthgouda, Sridhara. K

Share this Article

Similar Articles with Keyword 'array'

Downloads: 0

Research Paper, Electronics & Communication Engineering, India, Volume 10 Issue 7, July 2021

Pages: 1498 - 1500

Design of Efficient Braun Multiplier for Arithmetic Applications

Telagamalla Gopi

Share this Article

Downloads: 97

Research Paper, Electronics & Communication Engineering, India, Volume 9 Issue 12, December 2020

Pages: 267 - 270

Self Powered Nanopiezoelectric Device Based on ZnO Nanorod Array on Flexible Conjugated Copolymer Hybrid

Elsa Sneha Thomas

Share this Article



Top