Low Power-Delay Design of 4-Bit ALU Using GDI Technique and Its Comparison
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
www.ijsr.net | Open Access | Fully Refereed | Peer Reviewed International Journal

ISSN: 2319-7064

Research Paper | Electronics & Communication Engineering | India | Volume 6 Issue 7, July 2017

Low Power-Delay Design of 4-Bit ALU Using GDI Technique and Its Comparison

Sukesh B Pednekar, Sheela Kore

This paper propose the new technology called Gate Diffusion Input [GDI] method for low power-high speed implementation of 4-bit ALU. The ALU is the most important block (brain) of central processing unit and is essential in the applications such as DSP, microprocessors and embedded systems. In this implementation the ALU block needs full adder, 2-bit multiplexer, 4-bit multiplexer and some basic gates, which are implemented to perform Logic Operations, Arithmetic Operations, Increment And Decrement. The sub-components of the ALU block are designed using GDI cell in order to reduce total power of the circuitry. The simulation is done using 180nm technology on cadence virtuoso platform.

Keywords: Arithmetic Logic Unit, Full Adder, Gate Diffusion Input GDI, CMOS logic, Power, Delay

Edition: Volume 6 Issue 7, July 2017

Pages: 1831 - 1837

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How to Cite this Article?

Sukesh B Pednekar, Sheela Kore, "Low Power-Delay Design of 4-Bit ALU Using GDI Technique and Its Comparison", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=20071705, Volume 6 Issue 7, July 2017, 1831 - 1837

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