Research Paper | Electronics & Communication Engineering | India | Volume 3 Issue 1, January 2014
Modeling and Simulation of Single Stage Voltage Controlled Oscillator using Adaptive Voltage level Technique
Neeta Yadav, Nitin Saluja
A single stage source coupled CMOS voltage controlled oscillator is presented here using Adaptive voltage level technique (AVL) with the advancement of minimizing the power dissipation and generating rapidly high frequency of oscillation. The single stage VCO circuit has a low phase noise due to minimizing the noise sources. The voltage controlled oscillator is used in phase lock loop (PLL) as a frequency synthesizer to generate local oscillation frequency. Power dissipation is one of the most important performance parameter here, The Adaptive Voltage level techniques have applied in presented work mitigate the power dissipation. The simulation and performance analysis of proposed circuit is evaluated in Cadence virtuoso tool. In this simulator we use 45nm standard CMOS process technology. Simulation provides comparative study of different power reduction techniques on the basis of static and dynamic power. AVL technique provides 3.97fw static power and 38.02pw dynamic power for the 0.7v supply voltage at room temperature.
Keywords: Voltage Control Oscillator, AVL, Power dissipation, Cadence Virtuoso
Edition: Volume 3 Issue 1, January 2014
Pages: 350 - 354
How to Cite this Article?
Neeta Yadav, Nitin Saluja, "Modeling and Simulation of Single Stage Voltage Controlled Oscillator using Adaptive Voltage level Technique", International Journal of Science and Research (IJSR), https://www.ijsr.net/search_index_results_paperid.php?id=02013816, Volume 3 Issue 1, January 2014, 350 - 354
91 PDF Views | 68 PDF Downloads
Similar Articles with Keyword 'AVL'
Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 1, January 2014
Pages: 350 - 354Modeling and Simulation of Single Stage Voltage Controlled Oscillator using Adaptive Voltage level Technique
Neeta Yadav, Nitin Saluja
M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 10, October 2015
Pages: 616 - 619Modified Wavelet Based Sharp Feature Multi-Focus Image Fusion in DCT Domain
Kawaljit Kaur, Tanvi
Similar Articles with Keyword 'Power dissipation'
Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 7, July 2014
Pages: 1104 - 1108Power Reduction Approach in Combinational Circuit (Half and Full Subtractor)
Navendra Rawat, Rakesh Jain
Research Paper, Electronics & Communication Engineering, India, Volume 3 Issue 9, September 2014
Pages: 943 - 949Design and Analysis of CMOS Multipliers at 180nm and 350nm
Jagmeet Singh, Hardeep Singh
Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 8, August 2015
Pages: 1597 - 1602Design Of 7T SRAM Cell Using Self-Controllable Voltage Level Circuit to Achieve Low Power
Vema Vishnu Priya, G.Ramesh
M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 9, September 2015
Pages: 1325 - 1327A Low Power Highly Applicable Approach for Caches Based on STT-RAM Technology
Neethu Anna Sabu, Sreeja K. A.
M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 5, May 2015
Pages: 2218 - 2222A Power Efficient Design of Reversible RAM Using Pseudo Reed-Muller Expression
Shibinu A. R, Rajkumar.P
Similar Articles with Keyword 'Cadence Virtuoso'
Research Paper, Electronics & Communication Engineering, India, Volume 2 Issue 7, July 2013
Pages: 264 - 267Implementation of an Arithmetic Logic Unit using Area Efficient Carry Look-Ahead Adder and Booth's Multiplier
Sarwagya Chaudhary
M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 4 Issue 9, September 2015
Pages: 257 - 260Low Phase Noise Ring Oscillator Using Current Steering Technique
G. Gopal, Sri M. Madhusudhan Reddy
Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 6, June 2015
Pages: 2827 - 2831Analysis of Modified Hybrid Full Adder with High Speed
Jigyasa, Kumar Saurabh
Research Paper, Electronics & Communication Engineering, India, Volume 6 Issue 1, January 2017
Pages: 2320 - 2323Implementation of Low Power Adiabatic based Inverter for Dynamic Comparator
Heena Parveen, Vishal Moyal
M.Tech / M.E / PhD Thesis, Electronics & Communication Engineering, India, Volume 6 Issue 11, November 2017
Pages: 2142 - 2145Novel Design of Low Power Nonvolatile 10T1R SRAM Cell
Vani Tripathi, Bhawna Trivedi