Downloads: 119 | Views: 127
Research Paper | Electronics & Communication Engineering | India | Volume 2 Issue 8, August 2013
Noise Immune and Area Optimized Serial Interface for FPGA based Industrial Interfaces
D. Ravi  | K. S. R Murthy 
Abstract: This project describes a novel architecture based on Recursive Running Sum (RRS) filter implementation for wire and wireless data processing. UARTs are used for asynchronous serial data communication between remote embedded systems. If physical channel is noisy then, serial data bits get corrupted during transmission. The UART core described here, utilizes recursive running sum filter to remove noisy samples. Input data signal is directly sampled with system clock and samples are accumulated over a window size. The window size is user programmable and it should be set to one tenth of required bit period. The intermediate data bit is decoded using magnitude comparator. The advantage of this architecture is that baud rate is decided by the window size so there is no need of any external timer module which is normally required for standard UARTs. The Recursive Running Sum (RRS) filter architecture with programmable window size of M is designed and modules are implemented with VHDL language. This project implementation includes many applications in wireless data communication Systems like RF, Blue tooth, WIFI, ZigBee wireless sensor applications. Total coding written in VHDL language. Simulation in Modelsim Simulator, Synthesis done by XILINX ISE 9.2i. Synthesis result is verified by the Chipscope. Input signal given from the keyboard and output is seen by the help of HyperTerminal.
Keywords: Universal, data processing, signals, communication, noise
Edition: Volume 2 Issue 8, August 2013,
Pages: 123 - 125
Similar Articles with Keyword 'Universal'
Research Paper, Electronics & Communication Engineering, Egypt, Volume 10 Issue 12, December 2021Pages: 1281 - 1287
Feature Level Fusion of Palmprint and Iris Images for Person Identification
May Essam | Fayez Wanis Zaki | Mervat El-Seddek
Research Paper, Electronics & Communication Engineering, India, Volume 8 Issue 12, December 2019Pages: 1321 - 1324
Design of a High Selectivity Quadband Bandpass Filter Based on Open Loop Stub Loaded Resonator for UMTS, WLAN, Wimax and ITU Applications
J. Parimala | Dr. H. Umma Habiba